General Summary:
Excellent Design verification domain expertise of min 8 years upto 12 years.
Develop test strategy, TB architecture and test plan for new IP’s/new features
Develop strategies for re-useable, scalable and enhance Sub system level verification environment
Excellent C/System Verilog/Verilog skills to handle C based TB environment
Strong skills in debug, post silicon debug-failure re-creation and root cause analysis
Scripting proficiency - PERL, Python, for developing applicable automation
AMBA, AXI bus protocols
Power intent verification, GLS etc.
Capable of communicating effectively with all stakeholders across the globe
Capable of seeding a new team for new IPs, able to hire and expand the team in expertise and efficiency
Capable of mentoring the team members for their career growth, maintaining diversity in the team, collaborating with other leads and managing multiple parallel projects
Take initiatives to enable various ideas for improving efficiencies.
Good to have:
Image Processing, DSI/DP/HDMI Protocols
Good knowledge of new methodologies, flows and tools to be incorporated.
Formal verification
Minimum Qualifications:
• Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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