General Summary:
Qualcomm France’s QITC mission is to develop and deploy highly configurable custom-built interconnect hardware NoC (Network-on-Chip) IPs, software tools, exploration and verification methodologies so that worldwide SoC integration teams can quickly assemble SoCs with the desired Power Performance Area (PPA) characteristics. To this end, QITC technology embraces the complete SoC infrastructure to provide increased SoC performance at minimal cost for integration. Our work is at the backbone of the SoC, interconnecting all major IP solutions. QITC is always searching for new solutions to increase the design and quality of the NoCs micro architecture hence the desire to bring new machine learning technics in the process.
Mission:
The objective of this internship is to develop AI-based solutions for analyzing NoC designs using internally existing AI LLM models at Qualcomm. The intern will work with datasets comprising all the existing NoCs used within Qualcomm over the last decades. The key aspects of the project include understanding the key design parameters of NoCs, training the model to analyze these parameters, and providing meaningful optimization proposals to NoC designers. Additionally, the intern will create a brand-new solution to automate the process of analyzing the microarchitecture and design parameters, providing PPA improvements and suggestions for every design. Another important application would be to detect unusual configurations of NoCs that may lead to suboptimal implementations.
Environment:
The internship is offered in the Qualcomm France R&D NoC technology center in the Guyancourt’s office (around 50 engineers). The internship is proposed by the QITC Deployment solutions team (10 people), mainly responsible for QITC technology deployment and usage within Qualcomm worldwide. The study case will be one or multiple existing complex NoCs from the Qualcomm NoCs database and the objective would be to implement a solution that can be used for next generation snapdragon application processor, the trainer may have to interact virtually with worldwide Qualcomm teams in India and United-States, and daily interaction will be with Qualcomm Interconnect Technology Center in Guyancourt France.
Roadmap:
• Initial Training:
o Acquire a good understanding of the existing technology and tools
o Getting familiar with the Infrastructure NoCs and requirements for noc creation and delivery requirements
• Core Activity:
o Develop AI-based algorithms and models for NoC analysis.
o Reduce the area of NoC designs and optimize PPA.
o Detect unusual parameters that may affect performance and reliability.
o Collaborate with various teams to understand requirements and gather data.
o Create a prototype demonstrating the AI-based solutions.
• Bonus:
o Bench the solution on the existing database of Qualcomm NoCs to prepare for widespread adoption Initial Training:
Skills/Requirements:
Final year master’s degree in Microelectronics, Computer Science, or related field Scripting in python, bash (and any you would need).
Any knowledge on machine learning would be a plus.
Fully proficient in French and proficient in English
Duration:
6 months.
Location:
Qualcomm France (Parc Ariane, Guyancourt)
Interest for the trainee:
The internship covers multiple facets of the SOC architecture, he or she will have the opportunity of working on widely used NoC technologies in Qualcomm and contribute to the enhancement of the noc micro architectures and quality.
The internship is paid.
Qualcomm Incorporated is an American global semiconductor company that designs and markets wireless telecommunications products and services. Headquartered in San Diego, California, USA, the company has 157 worldwide locations
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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