Multimedia ASIC Design Staff Engineer (Vancouver) in Vancouver at honor foundations

Date Posted: 12/13/2024

Job Snapshot

  • Employee Type:
    Full-Time
  • Location:
    Vancouver
  • Job Type:
  • Experience:
    Not Specified
  • Date Posted:
    12/13/2024

Job Description


Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:



The Multimedia Camera HW team is looking for strong ASIC design engineer for an exciting opportunity to be involved in the design of world class image and video processing blocks.

As a member of team, the candidate will be responsible for the following:
  • Collaborate with hardware/system architects to micro-architect/design HW specific to Multimedia and Camera Image
  • Signal Processing algorithms
  • Own and deliver core level IP
  • RTL design
  • Run synthesis, review results to ensure desired QoR is met.
  • Perform design rule checks, low power checks, cross-clock-domain (CDC) checks.
  • Evaluate performance, area, power, and system cost tradeoffs
  • Work closely with design verification engineers to develop test plans and reference bus-functional models
  • Implement and debug tests at both the module and core level throughout the development cycle
  • Create and maintain design documents.
  • The environment is fast-paced and requires cross-functional interaction on a daily basis. So good communication, planning and execution skills are a must.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Ideal candidate to have 5+ years of industry exp. in:

  • Verilog or VHDL RTL design
  • Design Verification
  • Bus protocols like AHB, AXI
  • Image, Video, Graphics, Multimedia Processing, or DSP
  • Experience with RTL sanity tools specific to Design Rule Checking , Clock Domain Crossing checks, Synthesis, Timing analysis, Low power checks

Preferred Qualifications-

  • Experience with System Verilog or System C
  • ASIC implementation of Image Processing Camera IP
  • Experience working with synthesis and physical design teams
  • TCL/Perl/Python/shell-scripting skills a major plus

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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If you would like more information about this role, please contact Qualcomm Careers.

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