General Summary:
Understand Video Codec specification for respective blocks
Micro-architect of sub-block design
Understand all interfaces/Config for respective blocks
Coding and debugging the functionality for all respective blocks
Perform design optimizations for Power/Area/Timing/Performance
Strong DSP/Multimedia Domain Knowledge on Video Codecs/Computer Vision along with Hardware Implementation is preferred.
Experience in micro-architecting & designing complex datapath cores for ASICs/SoCs including AI/ML cores for CV applications
Experience with RTL coding using Verilog/VHDL/system Verilog
Familiar with the Synthesis and Formal Verification
Simulation debugging with Verdi & log file.
Exposure in scripting
Familiar with the Linting, CDC, Low Power etc.
Good team player. Need to interact with the verification engineers proactively
Ability to debug and solve issues independently
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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