CPU STA - Staff in Hyderabad at honor foundations

Date Posted: 12/22/2024

Job Snapshot

  • Employee Type:
    Full-Time
  • Location:
    Hyderabad
  • Job Type:
  • Experience:
    Not Specified
  • Date Posted:
    12/22/2024

Job Description


Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

•  Extensive experience in Place & Route with FC or Innovus is an absolute must

•  Complete ASIC flow with low power, performance and area optimization techniques

•  Experience with STA using Primetime and/or Tempus is required

•  Proficient in constraint generation and validation

•  Experience of multiple power domain implementation with complex UPF/CPF definition required

•  Formal verification experience (Formality/Conformal)

•  Perl/Tcl, Python, C++ skills are needed

•  Strong problem solving and ASIC development/debugging skills

•  Experience with CPU micro-architecture and their critical path

•  Low power implementation techniques experience

•  High speed CPU implementation

•  Clock Tree Implementation Techniques for High Speed Design Implementation are required

•  Exposure to Constraint management tool and Verilog coding experience

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

•  Extensive experience in Place & Route with FC or Innovus is an absolute must

•  Complete ASIC flow with low power, performance and area optimization techniques

•  Experience with STA using Primetime and/or Tempus is required

•  Proficient in constraint generation and validation

•  Experience of multiple power domain implementation with complex UPF/CPF definition required

•  Formal verification experience (Formality/Conformal)

•  Perl/Tcl, Python, C++ skills are needed

•  Strong problem solving and ASIC development/debugging skills

•  Experience with CPU micro-architecture and their critical path

•  Low power implementation techniques experience

•  High speed CPU implementation

•  Clock Tree Implementation Techniques for High Speed Design Implementation are required

•  Exposure to Constraint management tool and Verilog coding experience

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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If you would like more information about this role, please contact Qualcomm Careers.

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